The present invention relates to a wiring board in which a semiconductor chip having a semiconductor element for performing a high-speed transmission is mounted or embedded and to a semiconductor device using the wiring board.
As recent electronic equipment has become smaller in size and higher in performance, there have been trends toward higher operating speed and further modulization. As a package for a semiconductor device responsive to the trends, a BGA (Ball-Grid-Array) semiconductor device which is a package of surface-mounting type having ball bumps arranged in rows and columns on the bottom surface thereof has been developed.
Referring to the drawings, an example of a conventional BGA semiconductor device provided for high-speed transmission will be described.
FIG. 4 shows a plan structure of the conventional BGA semiconductor device. As shown in the drawing, a prior art BGA semiconductor device 100 has: a substrate 101 composed of a multilayer structure of an insulating film made of an epoxy resin or the like and a wiring layer made of a conductor material; a plurality of signal lines 102 formed in mutually spaced relationship in an upper surface of the substrate 101 to extend in parallel from the center portion of the substrate 101 to the side edge portions thereof; interline ground layers 103 each formed in the region of the upper surface of the substrate 101 located between the adjacent signal lines 102 to prevent crosstalk therebetween; and a semiconductor chip 104 bonded to the center portion of the substrate 101 by using a soldering material or the like.
The semiconductor chip 104 is electrically connected to each of the signal lines 102 via wires 105. Each of the signal lines 102 and a ground layer (not shown) constitute a microstrip line, while each of back-surface lines (not shown) and an internal power-source layer constitute a microstrip line. Each of the microstrip lines has a specified characteristic impedance Z0.
The signal lines 102 are electrically connected to the respective back-surface lines and to ball bumps (not shown) through vias 106. The interline ground layers 103 are also electrically connected to the ground layer through the vias 106. The semiconductor chip 104 and the respective end portions of the signal lines 102 and the interline ground layers 103 closer to the semiconductor chip 104 are contained in a mold area 107 of the substrate 101.
As the number of the external output terminals of the semiconductor chip 104 increases in the prior art BGA semiconductor device 100, the density of the lines on the substrate 101 also increases to increase the electromagnetic interference between the signal lines 102, so that the influence of crosstalk is no more negligible. To prevent the crosstalk, conductor layers such as the interline ground layers 103 are provided between the adjacent signal lines 102.
In the conventional semiconductor device 100, however, one end or both ends of each of the interline ground layers 103 are open. If one end of each of the interline ground layers 103 is open, the interline ground layer 103 functions as an open stub in the presence of a flowing RF wave.
If a plurality of semiconductor elements on the semiconductor chip 104 switch simultaneously, simultaneous switching noise also termed ground bounce occurs in the internal power-source layer and internal ground layer so that the respective potentials of the power source layer and the ground layer fluctuate significantly.
FIG. 5 shows respective equivalent circuits of the signal line 102 and the interline ground layer 103. When a square-wave signal containing a large number of harmonic components propagates along the signal line 102, the square-wave signal is induced by the interline ground layer 103 so that ground bounce occurs in response in the interline ground layer 103. At this time, a short-circuited state arises at a frequency at which the line length of the open stub of the interline ground layer 103 for crosstalk prevention is equal to one quarter of an effective wavelength so that a specified frequency component is totally reflected in opposite phase by the open end of the interline ground layer 103 having one open end. As a result, the interline ground layer 103 provided intentionally for cross talk prevention causes crosstalk between the square-wave signal propagating along the signal line 102 and the reflected component, which greatly disturbs the square-wave signal.
In addition, the potential of the internal ground layer or the like undergoes larger fluctuations, which may induce a misoperation in the semiconductor device and in a system incorporating the semiconductor device.
In view of the foregoing conventional problems, it is therefore an object of the present invention to suppress transmission distortion occurring between lines in a wiring board in which a semiconductor device having a semiconductor element for performing high-speed transmission is mounted or embedded.
To attain the object, the present invention fixes an interference-preventive conductor layer for crosstalk prevention provided between the signal lines to a specified potential at a point at a distance of one quarter or less of the effective wavelength of a timing (synchronous) signal for signal transmission from an open end of the interference-preventive conductor layer.
Specifically, a wiring board according to the present invention comprises: a substrate; a plurality of lines provided on the substrate; an interference-preventive conductor layer provided between the lines to have open ends and prevent signal interference between the lines; and potential fixing means electrically connected to the interference-preventive conductor layer, the potential fixing means being provided at a point at which a distance from each of the open ends of the interference-preventive conductor layer is less than one quarter of a wavelength corresponding to a maximum frequency component of harmonic components contained in the signal.
In the wiring board according to the present invention, the potential fixing means for fixing, to the specified value, the potential of the interference-preventive layer for preventing interference between signals on the lines is provided at a point at which a distance from each of the open ends of the interference-preventive conductor layer is less than one quarter of the wavelength corresponding to the maximum frequency component of harmonics contained in the signal. This prevents the frequency component of the timing signal from being totally reflected in opposite phase from each of the open ends of the interference-preventive conductor layer. This prevents significant fluctuations in a square timing signal such as a clock signal propagating along the line, which are due to the crosstalk of the reflected component from the interference-preventive conductor layer to the timing signal. Consequently, transmission distortion arising between the lines is suppressed.
In the wiring board of the present invention, the substrate is preferably composed of a multilayer structure of a plurality of wiring layers and an insulating film formed between the plurality of wiring layers and the potential fixing means is preferably connected to at least one of the plurality of wiring layers.
A semiconductor device according to the present invention comprises: a substrate; a plurality of lines provided on the substrate; a semiconductor chip held on the substrate, the semiconductor chip having a semiconductor element electrically connected to the plurality of lines; an interference-preventive conductor layer provided between the lines to have open ends and prevent signal interference between the lines; and potential fixing means electrically connected to the interference-preventive conductor layer, the potential fixing means being provided at a point at which a distance from each of the open ends of the interference-preventive conductor layer is less than one quarter of a wavelength corresponding to a maximum frequency component of harmonic components contained in the signal.
Since the semiconductor device according to the present invention uses, as a wiring board, the wiring board according to the present invention, a square timing signal propagating along the line is prevented from being greatly disturbed by the crosstalk of the reflected component on the timing signal. This suppresses transmission distortion occurring between the lines and improves the reliability of the semiconductor device.
In the semiconductor device of the present invention, the substrate is preferably composed of a multilayer structure of a plurality of wiring layers and an insulating film formed between the plurality of wiring layers and the potential fixing means is preferably a via connected to at least one of the plurality of wiring layers.